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| Philips Semiconductors Product specification PowerMOS transistor PHW7N60 GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope featuring high avalanche energy capability, stable off-state characteristics, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. QUICK REFERENCE DATA SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance MAX. 600 7 147 1.2 UNIT V A W PINNING - SOT429 (TO247) PIN 1 2 3 tab gate drain source drain DESCRIPTION PIN CONFIGURATION SYMBOL d g 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER ID IDM PD PD/Tmb VGS EAS IAS Tj, Tstg Continuous drain current Pulsed drain current Total dissipation Linear derating factor Gate-source voltage Single pulse avalanche energy Peak avalanche current Operating junction and storage temperature range CONDITIONS Tmb = 25 C; VGS = 10 V Tmb = 100 C; VGS = 10 V Tmb = 25 C Tmb = 25 C Tmb > 25 C VDD 50 V; starting Tj = 25C; RGS = 50 ; VGS = 10 V VDD 50 V; starting Tj = 25C; RGS = 50 ; VGS = 10 V MIN. - 55 MAX. 7 4.5 28 147 1.176 30 570 7 150 UNIT A A A W W/K V mJ A C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. TYP. 45 MAX. 0.85 UNIT K/W K/W June 1997 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 ELECTRICAL CHARACTERISTICS Tj = 25 C unless otherwise specified SYMBOL V(BR)DSS V(BR)DSS / Tj RDS(ON) VGS(TO) gfs IDSS IGSS Qg(tot) Qgs Qgd td(on) tr td(off) tf Ld Ls Ciss Coss Crss PARAMETER Drain-source breakdown voltage Drain-source breakdown voltage temperature coefficient Drain-source on resistance Gate threshold voltage Forward transconductance Drain-source leakage current Gate-source leakage current Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA VGS = 10 V; ID = 4.1 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 4.1 A VDS = 600 V; VGS = 0 V VDS = 480 V; VGS = 0 V; Tj = 125 C VGS = 30 V; VDS = 0 V ID = 6.2 A; VDD = 360 V; VGS = 10 V MIN. 600 2.0 3 TYP. 0.7 0.9 3.0 4.5 2 50 10 90 6 44 17 43 118 50 5 12.5 1100 140 80 MAX. 1.2 4.0 100 500 200 110 7 60 UNIT V V/K V S A A nA nC nC nC ns ns ns ns nH nH pF pF pF VDD = 300 V; ID = 6.2 A; RG = 9.1 ; RD = 47 Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 C unless otherwise specified SYMBOL IS ISM VSD trr Qrr PARAMETER Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Tmb = 25C Tmb = 25C IS = 7 A; VGS = 0 V IS = 6.2 A; VGS = 0 V; dI/dt = 100 A/s MIN. TYP. 530 6.7 MAX. 7 28 1.5 UNIT A A V ns C June 1997 2 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 1 Zth j-mb / (K/W) D= 0.5 0.2 BUKx57-mv 0.1 0.1 0.05 0.02 0.01 0 P D tp D= tp T t 1E+01 0 20 40 60 80 100 Tmb / C 120 140 0.001 1E-05 1E-03 t/s T 1E-01 Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb) ID% Normalised Current Derating Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T ID, Drain current (Amps) Tj = 25 C 7V 15 10 V 6V 5.5 V 10 PHP6N60 120 110 100 90 80 70 60 50 40 30 20 10 0 20 5V VGS = 4.5 V 5 0 20 40 60 80 Tmb / C 100 120 140 0 0 5 10 15 20 25 VDS, Drain-Source voltage (Volts) 30 Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 10 V ID / A BUK457-600B Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS 100 4 RDS(on), Drain-Source on resistance (Ohms) VGS = 4.5 V 5V PHP6N60 Tj = 25 C 10 RD S( O = N) VD S/ ID tp = 10 us 100 us 3 5.5 V 2 6V 10 V 1 1 ms 1 DC 10 ms 100 ms 0.1 10 100 VDS / V 1000 0 0 5 10 ID, Drain current (Amps) 15 20 Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS June 1997 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 20 ID, Drain current (Amps) VDS = 30 V PHP6N60 Tj = 25 C 4 VGS(TO) / V max. 15 3 typ. 10 Tj = 150 C 2 min. 5 1 0 0 0 2 4 6 VGS, Gate-Source voltage (Volts) 8 10 -60 -40 -20 0 20 40 60 Tj / C 80 100 120 140 Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj gfs, Transconductance (S) VDS = 30 V Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS ID / A SUB-THRESHOLD CONDUCTION 10 PHP6N60 1E-01 8 1E-02 6 150 C 4 Tj = 25 C 1E-03 2% typ 98 % 1E-04 2 1E-05 0 1E-06 0 5 10 ID, Drain current (A) 15 20 0 1 2 VGS / V 3 4 Fig.8. Typical transconductance. gfs = f(ID); parameter Tj a Normalised RDS(ON) = f(Tj) Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS Junction capacitances (pF) PHP6N60 10000 2 Ciss 1000 1 100 Coss Crss 0 -60 -40 -20 0 20 40 60 Tj / C 80 100 120 140 10 1 10 100 VDS, Drain-Source voltage (Volts) 1000 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 6.2 A; VGS = 10 V Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz June 1997 4 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 15 VGS, Gate-Source voltage (Volts) ID = 6.2 A Tj = 25 C 240 V 120 V PHP6N60 20 IF, Source-Drain diode current (Amps) VGS = 0 V PHP6N60 VDD = 360 V 15 10 10 150 C Tj = 25 C 5 5 0 0 50 100 Qg, Gate charge (nC) 150 0 0 0.2 0.4 0.6 0.8 1 VSDS, Source-Drain voltage (Volts) 1.2 1.4 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS Switching times (ns) VDD = 300 V VGS = 10 V RD = 47 Ohms ID = 6.2 A Tj = 25 C td(off) PHP6N60 Fig.16. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj EAS, Normalised unclamped inductive energy (%) 1000 120 110 100 90 80 70 60 50 40 30 20 10 0 100 tf tr td(on) 10 0 10 20 30 40 RG, Gate resistance (Ohms) 50 60 20 40 60 80 100 Starting Tj ( C) 120 140 Fig.14. Typical switching times. td(on), tr, td(off), tf = f(RG) Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C Fig.17. Normalised unclamped inductive energy. EAS% = f(Tj) 1.15 1.1 1.05 1 0.95 0.9 + L VDS VGS 0 RGS T.U.T. R 01 shunt VDD -ID/100 0.85 -100 -50 0 50 Tj, Junction temperature (C) 100 150 Fig.15. Normalised drain-source breakdown voltage. V(BR)DSS/V(BR)DSS 25 C = f(Tj) Fig.18. Unclamped inductive test circuit. 2 EAS = 0.5 LID V(BR)DSS /(V(BR)DSS - VDD ) June 1997 5 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 MECHANICAL DATA Dimensions in mm Net Mass: 5 g 5.3 3.5 21 max 15.5 max seating plane 7.3 16 max 5.3 max 1.8 o 3.5 max 2.5 4.0 max 1 2.2 max 3.2 max 5.45 2 3 0.9 max 1.1 5.45 0.4 M 15.5 min Fig.19. SOT429 (TO247); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT429 envelopes. 3. Epoxy meets UL94 V0 at 1/8". June 1997 6 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHW7N60 DEFINITIONS Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. June 1997 7 Rev 1.000 |
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